DocumentCode
1171715
Title
Closed-form delay and slew metrics made easy
Author
Alpert, Charles J. ; Liu, Frank Ying ; Kashyap, Chandramouli V. ; Devgan, Anirudh
Author_Institution
IBM Corp., Austin, TX, USA
Volume
23
Issue
12
fYear
2004
Firstpage
1661
Lastpage
1669
Abstract
For optimizations like physical synthesis and static timing analysis, efficient interconnect delay and slew computation is critical. Since one cannot often afford to run asymptotic waveform evaluation (Pillage and Rohrer, 1990), constant time solutions are required. This work presents the first complete solution to closed-form formulas for both delay and also for slew. Our metrics are derived from matching circuit moments to the lognormal distribution. From a single table, one can easily implement the metrics for delay and slew for both step and ramp inputs. Experiments validate the effectiveness of the metrics for nets from a real industrial design.
Keywords
circuit optimisation; delays; electronic design automation; integrated circuit interconnections; integrated circuit layout; log normal distribution; network routing; timing jitter; asymptotic waveform evaluation; circuit moment matching; closed-form delay; closed-form formulas; constant time solutions; design automation; integrated circuit interconnections; integrated circuit routing; interconnect delay; log normal distribution; physical synthesis; ramp inputs; signal analysis; slew computation; slew metrics; static timing analysis; step inputs; Automation; Delay effects; High performance computing; Integrated circuit interconnections; Integrated circuit technology; Linear circuits; Physics computing; Routing; Signal analysis; Timing; 65; Design automation; integrated circuit interconnections; routing; signal analysis;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2004.837727
Filename
1362736
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