Title :
Interconnection and packaging of solid-state circuits
Author :
Pedder, David J.
Author_Institution :
Plessey Res. Caswell Ltd., Towcester, UK
fDate :
6/1/1989 12:00:00 AM
Abstract :
The growing interaction between the technologies used to interconnect and package solid-state circuits, the circuit design process, and the performance of such circuits in a system or subsystem is reviewed. The nature of this interaction is discussed at all levels of interconnection and packaging for silicon integrated circuits, and examples of novel developments which present further opportunities to the circuit designer are given. Particular attention is given to the emerging multichip module packaging concept, which offers a similar level of circuit complexity and integration to wafer-scale integration
Keywords :
elemental semiconductors; integrated circuit technology; packaging; reviews; silicon; Si integrated circuits; circuit design process; interconnection; monolithic IC; multichip module; packaging; review; solid-state circuits; Circuit synthesis; Integrated circuit interconnections; Integrated circuit packaging; Integrated circuit technology; Isolation technology; Multichip modules; Power dissipation; Silicon carbide; Solid state circuits; Very large scale integration;
Journal_Title :
Solid-State Circuits, IEEE Journal of
