Title :
A CV technique for measuring thin SOI film thickness
Author :
Chen, Jian ; Solomon, Ray ; Chan, Tung-Yi ; Ko, Ping-Keung ; Hu, Chenming
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
A technique is developed to measure silicon-on-insulator (SOI) silicon device film thickness using a MOSFET. The method is based on CV measurements between gate and source/drain at two different back-gate voltages. The SOI devices used in this study were n/sup +/ polysilicon gate n-channel MOSFETs fabricated with modified submicrometer CMOS technology on SIMOX (separation by implanted oxygen) wafers. The SIMOX wafers were implanted with a high dose of oxygen ions (10/sup 18/ cm/sup -2/) at 200 keV and subsequently annealed at 1230 degrees C. The NMOS threshold boron implant dose is 2*10/sup 12/ cm/sup -2/. This method is simple, nondestructive, and no special test structure is needed. Using this technique, SOI film thickness mapping was made on a finished wafer and a thickness variation of +or-150 AA was found.<>
Keywords :
capacitance measurement; insulated gate field effect transistors; semiconductor-insulator boundaries; thickness measurement; 1230 C; 200 keV; CV measurements; MOSFET; SIMOX; SOI devices; SOI film thickness mapping; Si-SiO/sub 2/; different back-gate voltages; finished wafer; nondestructive measurement; submicrometer CMOS technology; Annealing; Boron; CMOS technology; MOS devices; MOSFET circuits; Semiconductor films; Silicon devices; Silicon on insulator technology; Thickness measurement; Voltage;
Journal_Title :
Electron Device Letters, IEEE
