DocumentCode
1172566
Title
A 25-MS/s 14-b 200-mW ΣΔ Modulator in 0.18-μm CMOS
Author
Balmelli, Pio ; Huang, Qiuting
Author_Institution
Integrated Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland
Volume
39
Issue
12
fYear
2004
Firstpage
2161
Lastpage
2169
Abstract
The design of a fifth-order 4-b quantizer single-loop ΣΔ modulator is presented that achieves 25-MS/s conversion rate with 84 dB of dynamic range and 82 dB of signal-to-noise ratio. Implemented in a 0.18-μm CMOS technology, the 0.95-mm2 chip has a power consumption of 200 mW from a 1.8-V supply.
Keywords
CMOS integrated circuits; integrated circuit design; mixed analogue-digital integrated circuits; sigma-delta modulation; switched capacitor networks; 0.18 micron; 1.8 V; 14 bits; 200 mW; CMOS technology; analog-digital conversion; dynamic range; fifth-order sigma-delta modulator; mixed analog-digital integrated circuits; power consumption; quantizer; sigma-delta modulation; signal-to-noise ratio; switched-capacitor circuits; Band pass filters; Bandwidth; CMOS technology; Delta modulation; Delta-sigma modulation; Digital modulation; Dynamic range; Laboratories; Modems; Signal to noise ratio; 211;digital conversion; 211;digital integrated circuits; 65; Analog mixed analog sigma-delta modulation; switched-capacitor circuits;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2004.836240
Filename
1362825
Link To Document