Title :
A single-chip dual-band tri-mode CMOS transceiver for IEEE 802.11a/b/g wireless LAN
Author :
Zargari, Masoud ; Terrovitis, Manolis ; Jen, Steve Hung-Min ; Kaczynski, Brian J. ; Lee, MeeLan ; Mack, Michael P. ; Mehta, Srenik S. ; Mendis, Sunetra ; Onodera, Keith ; Samavati, Hirad ; Si, William W. ; Singh, Kalwant ; Tabatabaei, Ali ; Weber, David ;
Author_Institution :
Atheros Commun., Irvine, CA, USA
Abstract :
A single-chip dual-band tri-mode CMOS transceiver that implements the RF and analog front-end for an IEEE 802.11a/b/g wireless LAN is described. The chip is implemented in a 0.25-μm CMOS technology and occupies a total silicon area of 23 mm2. The IC transmits 9 dBm/8 dBm error vector magnitude (EVM)-compliant output power for a 64-QAM OFDM signal. The overall receiver noise figure is 5.5/4.5 dB at 5 GHz/2.4 GHz. The phase noise is -105 dBc/Hz at a 10-kHz offset and the spurs are below -64 dBc when measured at the 5-GHz transmitter output.
Keywords :
CMOS integrated circuits; IEEE standards; OFDM modulation; phase noise; power amplifiers; radiofrequency integrated circuits; transceivers; wireless LAN; 0.25 micron; 10 KHz; 2.4 GHz; 4.5 dB; 5 GHz; 5.5 dB; 64-QAM OFDM signal; 802.11a WLAN; 802.11b WLAN; 802.11g WLAN; RF front-end; RF transceiver; analog front-end; dual-band CMOS transceiver; error vector magnitude; frequency synthesizer; low-noise amplifier; orthogonal frequency-division multiplexing; phase noise; power amplifier; receiver noise; tri-mode CMOS transceiver; wireless LAN; CMOS technology; Dual band; Noise figure; OFDM; Phase noise; Power generation; Radio frequency; Silicon; Transceivers; Wireless LAN; 02.11a; 02.11b; 02.11g; 65; Frequency synthesizer; IEEE; LNA; OFDM; RF transceiver; WLAN; low-noise amplifier; orthogonal frequency-division multiplexing; power amplifier; wireless LAN;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.836349
