Title :
ΣHigh-frequency LC VCO design using capacitive degeneration
Author :
Jung, Byunghoo ; Harjani, Ramesh
Author_Institution :
Univ. of Minnesota, Minneapolis, MN, USA
Abstract :
In this paper, we evaluate the high-frequency performance limitations of traditional LC voltage-controlled oscillators (VCOs) that use a cross-coupled negative resistance cell and propose a new topology that overcomes these limitations. The proposed cell is based on a capacitively emitter degenerated topology which uses a cross-coupled MOS pair as the degeneration cell. The cross-coupled MOS pair contributes additional conductance and results in a higher maximum attainable oscillation frequency and better negative resistance characteristics as compared to the other topologies at high frequencies. These properties combined with its small effective capacitance enable low-power low-noise high-frequency VCO implementations. The proposed topology is demonstrated through a 20-GHz fully integrated LC VCO implemented in the IBM SiGe 0.25-μm BiCMOS process. A comparison of its figure of merit with previously reported 20-GHz VCOs shows the effectiveness of the proposed topology.
Keywords :
BiCMOS analogue integrated circuits; MOS integrated circuits; negative resistance; voltage-controlled oscillators; 0.25 micron; 20 GHz; BiCMOS integrated circuits; SiGe; analog integrated circuits; capacitive degeneration; cross-coupled MOS pair; high-frequency LC VCO design; high-frequency LC oscillators; negative resistance cell; oscillation frequency; voltage-controlled oscillators; Bandwidth; BiCMOS integrated circuits; Capacitance; Circuit topology; Frequency; Germanium silicon alloys; Performance analysis; Semiconductor device noise; Silicon germanium; Voltage-controlled oscillators; 65; Analog integrated circuits; BiCMOS integrated circuits; VCOs; capacitive degeneration; high-frequency; negative resistance cell; voltage-controlled oscillators;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.835643