A four-channel ADSL2+ analog front-end for CO applications with 75 mW per channel, built in 0.13-μm CMOS

Author

Pessl, Peter ; Gaggl, Richard ; Hohl, Johannes ; Giotta, Dario ; Hauptmann, Jörg

Author_Institution

Infineon Technol. Design Center Austria, Villach, Austria

Volume

39

Issue

12

fYear

2004

Firstpage

2371

Lastpage

2378

Abstract

This paper describes a four-channel ADSL2+ analog front-end (AFE) targeted at a central office application, with a power consumption of 75 mW per channel. The design is implemented using a modern 0.13-μm CMOS process. The AFE consists of a 14-bit ADC and DAC, a very low-noise high-linearity automatic gain control (AGC), analog filter blocks, and digital decimation and interpolation filter stages. The design has been optimized to achieve the lowest possible power consumption, high performance, and cost efficiency.

Keywords

CMOS analogue integrated circuits; analogue-digital conversion; automatic gain control; digital subscriber lines; digital-analogue conversion; integrated circuit design; power consumption; 0.13 micron; 14-bit ADC; 14-bit DAC; 75 mW; CMOS; analog filter block; analog front-end; automatic gain control; digital decimation; four-channel ADSL; interpolation filter stage; power consumption; Attenuation; CMOS process; Central office; Cost function; DSL; Design optimization; Digital filters; Energy consumption; Gain control; Interpolation; 65; ADSL; AFE; analog front-end;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2004.835645

Filename

1362845