Title :
40-Gb/s amplifier and ESD protection circuit in 0.18-μm CMOS technology
Author :
Galal, Sherif ; Razavi, Behzad
Author_Institution :
Electr. Eng. Dept., Univ. of California, Los Angeles, CA, USA
Abstract :
A triple-resonance LC network increases the bandwidth of cascaded differential pairs by a factor of 2√3, yielding a 40-Gb/s CMOS amplifier with a gain of 15 dB and a power dissipation of 190 mW from a 2.2-V supply. An ESD protection circuit employs negative capacitance along with T-coils and pn junctions to operate at 40 Gb/s while tolerating 700-800 V.
Keywords :
CMOS integrated circuits; coils; electrostatic discharge; resonance; wideband amplifiers; 0.18 micron; 15 dB; 190 mW; 2.2 V; 700 to 800 V; CMOS technology; ESD protection circuit; T-coil; broadband amplifier; distributed amplifier; inductive peaking; negative capacitance; resonant circuits; triple-resonance LC network; Bandwidth; CMOS technology; Capacitance; Circuits; Differential amplifiers; Electrostatic discharge; Gain; Power amplifiers; Power dissipation; Protection; 65; Broadband amplifiers; ESD; T-coils; distributed amplifiers; inductive peaking; resonant circuits;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.835639
