Title :
A Compact Interface-Trapped-Charge-Induced Subthreshold Current Model for Surrounding-Gate MOSFETs
Author_Institution :
Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Kaohsiung, Taiwan
Abstract :
With the effects of equivalent oxide charges on the flatband voltage, we report a compact interface-trapped-charge-induced subthreshold current model for the surrounding-gate (SRG) MOSFETs based on the scaling equation and the drift-diffusion approach. It is found that a thin gate oxide can effectively reduce the subthreshold current degradation caused by the positive/negative trapped charges. In contrast to the thin gate oxide, a thick silicon film is required to alleviate the subthreshold current degradation caused by the negative trapped charges. In comparison with the fresh device, the damaged device with negative/positive trapped charges can decrease/increase more subthreshold current roll-up caused by the short-channel effects (SCEs). The model can be used to explore the hot-carrier-induced subthreshold current degradation for the SRG MOSFETs for its memory cell application.
Keywords :
MOSFET; hot carriers; semiconductor device models; compact interface-trapped-charge-induced subthreshold current model; drift-diffusion approach; equivalent oxide charges; flatband voltage; hot-carrier-induced subthreshold current degradation; memory cell application; positive/negative trapped charges; scaling equation; short-channel effects; surrounding-gate MOSFET; thick silicon film; thin gate oxide; Degradation; Logic gates; MOSFET; Mathematical model; Semiconductor device modeling; Silicon; Subthreshold current; Interface-trapped-charge-induced subthreshold current; scaling equation; surrounding-gate (SRG) MOSFETs;
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
DOI :
10.1109/TDMR.2014.2308913