DocumentCode
117324
Title
A multi-tiered optimization framework for heterogeneous computing
Author
Milluzzi, Andrew ; Richardson, Justin ; George, Alan ; Lam, Herman
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA
fYear
2014
fDate
9-11 Sept. 2014
Firstpage
1
Lastpage
6
Abstract
Modern computing nodes often contain more than just a CPU. With the advent of GPU accelerators and Xeon Phi co-processors, there are many architectures available for data processing. However, it is difficult to understand which device is best for a given application. The issue of real-world performance originates in the lack of quantifiable data and method for analysis. This paper presents a novel, multi-tiered framework that leverages Pareto optimization to objectively construct the best processing node for a set of computational kernels. By deconstructing the optimization process into three distinct framework tiers (kernel, device, and system), the system designer is able to understand how the various computational variables impact device choices. We show how we leverage a combination of metrics and benchmarking to form various Pareto sets. Moving through the tiers, these Pareto sets are combined to identify the various combinations that enable maximum performance.
Keywords
Pareto optimisation; graphics processing units; GPU accelerator; Pareto optimization; Pareto sets; Xeon Phi coprocessor; heterogeneous computing; multitiered optimization; Benchmark testing; Computer architecture; Graphics processing units; Kernel; Optimization; Performance evaluation;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Extreme Computing Conference (HPEC), 2014 IEEE
Conference_Location
Waltham, MA
Print_ISBN
978-1-4799-6232-7
Type
conf
DOI
10.1109/HPEC.2014.7041002
Filename
7041002
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