DocumentCode
1173344
Title
Matrix representations for sorting and the fast Fourier transform
Author
Sloate, Harry
Volume
21
Issue
1
fYear
1974
fDate
1/1/1974 12:00:00 AM
Firstpage
109
Lastpage
116
Abstract
The different versions of the fast Fourier transform (FFT) are described here for arbitrary base in terms of the matrix factors of the discrete Fourier transform matrix
. The Kronecker product notation and the ideal shuffle base
permutation operator form the basis for a unifying theory through which the various versions of the FFT can be viewed. The properties of the ideal shuffle base
permutation operator are used to arrive at FFT versions with such desirable properties as in-place computation or identical geometry from stage to stage. The FFT versions previously described in the literature are derived here. At the same time, algorithms for the sorting of FFT data in digit-reversed order are generated. These are explored and new sorting versions amenable to hardware implementation with sequential memory are presented. As an example of how the unifying theory is used, a number of FFT versions with identical geometry from stage to stage are derived. The hardware necessary for these algorithms is described for the base 4 case with
data points.
. The Kronecker product notation and the ideal shuffle base
permutation operator form the basis for a unifying theory through which the various versions of the FFT can be viewed. The properties of the ideal shuffle base
permutation operator are used to arrive at FFT versions with such desirable properties as in-place computation or identical geometry from stage to stage. The FFT versions previously described in the literature are derived here. At the same time, algorithms for the sorting of FFT data in digit-reversed order are generated. These are explored and new sorting versions amenable to hardware implementation with sequential memory are presented. As an example of how the unifying theory is used, a number of FFT versions with identical geometry from stage to stage are derived. The hardware necessary for these algorithms is described for the base 4 case with
data points.Keywords
Digital networks and systems; FFT (fast Fourier transform); Fast Fourier transform (FFT); Computational geometry; Discrete Fourier transforms; Fast Fourier transforms; Flow graphs; Hardware; Helium; Laboratories; Shift registers; Signal processing algorithms; Sorting;
fLanguage
English
Journal_Title
Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0098-4094
Type
jour
DOI
10.1109/TCS.1974.1083790
Filename
1083790
Link To Document