Title :
A reconfigurable manager for dynamically reconfigurable hardware
Author :
Resano, Javier ; Mozos, Daniel ; Verkest, Diederik ; Catthoor, Francky
Author_Institution :
Dept. of Comput. Archit. & Autom., Univ. Complutense de Madrid, Spain
Abstract :
Dynamic reconfiguration has been a technology solution in search of the right problem to solve. Effective use of the technology requires new programming and task management models. This article describes an approach to dynamic reconfiguration that reduces reconfiguration latency to the point where dynamic multimedia applications can now exploit such platforms.
Keywords :
field programmable gate arrays; processor scheduling; reconfigurable architectures; FPGA; dynamic reconfigurable hardware; field programmable gate array; multimedia applications; processor scheduling; programming; reconfigurable manager; reconfiguration latency; task management; Delay; Dynamic programming; Field programmable gate arrays; Hardware; Iterative decoding; Operating systems; Prefetching; Runtime; Technology management; Visualization; Performance Analysis and Design Aids; Real-time and embedded systems; Reconfigurable hardware;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2005.100
