DocumentCode
1173758
Title
An update on IEEE P1647: the e system verification language
Author
Berman, Victor
Author_Institution
Dept. of Victor Berman, Cadence Design Syst., North Andover, CA, Canada
Volume
22
Issue
5
fYear
2005
Firstpage
484
Lastpage
486
Abstract
The e language forms the basis of an extensive set of tools and methodologies, collectively known as verification process automation, and almost all major electronics companies worldwide use it. This paper discusses IEEE design automation standards project and shows that how the value of technology can be enhanced by the standardization process.
Keywords
IEEE standards; electronic design automation; formal verification; hardware description languages; standardisation; IEEE P1647; IEEE design automation standards; e system verification language; hardware description language; standardization; Character generation; Concurrent computing; Engineering management; Hardware design languages; Maintenance engineering; Object oriented modeling; Resource management; Scalability; System testing; Time to market; IEEE P1647; e language; functional verification; standardization; verification; verification process automation;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2005.102
Filename
1511984
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