DocumentCode :
1173939
Title :
A statistical model to predict the performance variation of polysilicon TFTs formed by grain-enhancement technology
Author :
Cheng, C.F. ; Jagar, Singh ; Poon, M.C. ; Kok, C.W. ; Chan, Mansun
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume :
51
Issue :
12
fYear :
2004
Firstpage :
2061
Lastpage :
2068
Abstract :
A statistical model to predict grain boundary distribution in the channel of a polysilicon thin-film transistor (TFT) is proposed. The model is valid for arbitrary transistor size to grain size ratio, and is particularly useful to predict the grain boundary distribution of recrystallized large-grain polysilicon TFTs where the transistor size is comparable to the grain size and gives significant device-to-device variation. The model has been extensively verified by comparing it with statistical data obtained from TFTs fabricated using metal-induced-lateral-crystallization and regular solid-phase epitaxial techniques. Good agreements between the experimental results and model prediction are demonstrated.
Keywords :
crystallisation; elemental semiconductors; grain boundaries; semiconductor device models; silicon; statistical distributions; thin film transistors; Si; arbitrary transistor size; grain boundary distribution; grain size ratio; grain-enhancement technology; metal-induced-lateral-crystallization; polysilicon TFT; recrystallized large-grain TFT; solid-phase epitaxial technique; statistical model; thin-film transistor; Circuits; Crystallization; Grain boundaries; Grain size; Predictive models; Semiconductor process modeling; Senior members; Solid modeling; Statistical distributions; Thin film transistors; 65; Crystallization; TFTs; grain boundaries; polysilicon; statistical modeling; thin-film transistors;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2004.838325
Filename :
1362968
Link To Document :
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