• DocumentCode
    1174228
  • Title

    Impact of high-k plug on self-heating effects of SOI MOSFETs

  • Author

    Komiya, Kenji ; Kawamoto, Toshitaka ; Sato, Shingo ; Omura, Yasuhisa

  • Author_Institution
    Dept. of Electron., Kansai Univ., Osaka, Japan
  • Volume
    51
  • Issue
    12
  • fYear
    2004
  • Firstpage
    2249
  • Lastpage
    2251
  • Abstract
    A novel SOI device structure that suppresses self-heating effects is proposed. Since it provides effective thermal paths from source to substrate and from drain to substrate, it successfully suppresses the lattice temperature rise throughout the whole device. Since the buried insulator is SiO2, it is almost free from the fabrication issues and performance issues in use of high-k material such as high internal charge density, high interface trap density, and drain-induced barrier lowering; the proposed device structure will be easy to fabricate using current trench isolation techniques.
  • Keywords
    MOSFET; heat transfer; isolation technology; silicon compounds; silicon-on-insulator; thermal conductivity; SOI MOSFET; Si-SiO2; buried insulator; drain-induced barrier lowering; heat flow; high interface trap density; high internal charge density; high-k plug; lattice temperature rise suppression; self-heating effects; thermal conductivity; thermal path; trench isolation techniques; Conductive films; Electrodes; High K dielectric materials; High-K gate dielectrics; Insulation; MOSFETs; Plugs; Silicon on insulator technology; Substrates; Thermal conductivity; 65; Buried insulator; MOSFET; SOI; heat flow; thermal conductivity;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2004.839874
  • Filename
    1362996