A High-Speed CMOS Image Sensor With Column-Parallel Two-Step Single-Slope ADCs

Author

Lim, Seunghyun ; Lee, Jeonghwan ; Kim, Dongsoo ; Han, Gunhee

Author_Institution

Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul

Volume

56

Issue

3

fYear

2009

fDate

3/1/2009 12:00:00 AM

Firstpage

393

Lastpage

398

Abstract

This paper proposes a column-parallel two-step single-slope (SS) ADC for high-speed CMOS image sensors. Error correction scheme to improve the linearity is proposed as well. A prototype sensor of 320 times 240 pixels has been fabricated with a 0.35-mum CMOS process. Measurement results demonstrate that the proposed ADC can achieve the conversion time of 4 mus , which is ten times faster than the conventional SS ADC. The proposed error correction effectively removes the dead band problem and yields DNL of +0.53/ -0.78 LSB and INL of +1.42/ -1.61 LSB. The power consumption is 36 mW from a supply voltage of 2.8 V.

Keywords

CMOS image sensors; analogue-digital conversion; error correction; high-speed techniques; low-power electronics; ADC conversion time; analog-to-digital converter; column-parallel two-step single-slope ADC; dead band removal technique; error correction; high-speed CMOS image sensor; power 36 mW; prototype sensor pixel fabrication; size 0.35 mum; time 4 mus; voltage 2.8 V; CMOS image sensors; Energy consumption; Error correction; Image sensors; Information technology; Linearity; Pixel; Prototypes; Signal resolution; Silicon; Column-parallel ADC; single-slope (SS) ADC; two-step ADC;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2008.2011846

Filename

4787269