DocumentCode
1176291
Title
Capacitance modelling for double-sided Si detectors with double-metal readout
Author
Husson, D.
Author_Institution
LEPSI-CRN, Strasbourg, France
Volume
41
Issue
4
fYear
1994
fDate
8/1/1994 12:00:00 AM
Firstpage
811
Lastpage
816
Abstract
A model is presented for calculation of the large contribution to electronic noise coming from the new double-metal readout on double-sided silicon strip detectors. It applies to the two types of N-side insulating schemes: electrode extension or P-barrier. The 3D capacitor structure is described by a grid model, whose sub-elements are all 2D calculated, using analytic formulae, discrete electrostatics and device simulation (PROUDS, TOSCA). The model is tested on existing detectors (SI, HPK, CSEM). All calculations are static
Keywords
capacitance; electronic engineering computing; semiconductor counters; semiconductor device models; semiconductor device noise; P-barrier; PROUDS; Si; TOSCA; capacitance; double-metal readout; double-sided Si detectors; electrode extension; noise; Analytical models; Capacitance; Capacitors; Detectors; Electrodes; Electrostatic analysis; Insulation; Silicon; Strips; Testing;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/23.322811
Filename
322811
Link To Document