Title :
Design and implementation of an MSI number based image watermarking architecture in transform domain
Author :
Mahanta, Koushik ; Das, Dwikul Jyoti ; Bhuyan, H. M. Khalid Raihan ; Dutta, Arin ; Gogoi, M.
Author_Institution :
Electron. & Commun., Assam Don Bosco Univ., Guwahati, India
Abstract :
Hardware based digital image watermarking is in a good demand these days because of its fast real time implementation. It is seen that hardware based watermarking often comes with computational complexity and difficulty in implementation. In this paper, we discuss the development and implementation of the hardware architecture of Digital Image Watermarking in transform domain using a newly developed simple yet secured algorithm. Walsh Transform is used to convert the cover image from spatial domain to transform domain as it is a secured Transform function and it is also feasible to synthesize the developed architecture using HDL (Hardware Description Language) synthesizer. The proposed architecture is not very resource rich. The proposed watermarking architecture will be very useful particularly for image authentication process and secured transmission of message inside an image. Here, the proposed algorithm embeds the watermark into a cover image and also extracts it at the receiving end using the MSI numbers generated during the watermark insertion process. One significant advantage of the algorithm is that there is no need of the original image to extract the watermark at the receiving end. The whole work can be viewed as the sequential amalgamation of three sub-tasks: theoretical modeling, designing the hardware architecture in Verilog HDL and performance observation by an adopted simulation set-up. The complete designed architecture is found to be compatible for verification using Field Programmable Gate Array (FPGA) for VLSI implementation.
Keywords :
VLSI; computational complexity; field programmable gate arrays; hardware description languages; image watermarking; transforms; FPGA; HDL; MSI number; VLSI implementation; Verilog HDL; Walsh Transform; computational complexity; digital image watermarking; field programmable gate array; hardware architecture; hardware description language synthesizer; image authentication process; image watermarking architecture; real time implementation; secured transform function; spatial domain; transform domain; watermark insertion process; Computer architecture; Hardware; Hardware design languages; Signal processing algorithms; Transforms; Transmitters; Watermarking; Digital Image Watermarking; FPGA; HDL; MSI; VLSI;
Conference_Titel :
Signal Processing and Integrated Networks (SPIN), 2014 International Conference on
Conference_Location :
Noida
Print_ISBN :
978-1-4799-2865-1
DOI :
10.1109/SPIN.2014.6776940