DocumentCode
1176598
Title
Bit vector architecture for computational mathematical morphology
Author
Handley, John C.
Author_Institution
Xerox Corp., Webster, NY, USA
Volume
12
Issue
2
fYear
2003
fDate
2/1/2003 12:00:00 AM
Firstpage
153
Lastpage
158
Abstract
A real-time, compact architecture is presented for translation-invariant windowed nonlinear discrete operators represented in computational mathematical morphology. The architecture enables output values to be computed in a fixed number of operations and thus can be pipelined. Memory requirements for an operator are proportional to its basis size. An operator is implemented by three steps: (1) each component of a vector observation is used as an index into a table of bit vectors; (2) all retrieved bit vectors are "ANDed" together; and (3) the position of the first nonzero bit is used as an index to a table of output values. Computational mathematical morphology is described, the new architecture is illustrated through examples, and formal proofs are given. A modification of the basic architecture provides for increasing operators.
Keywords
image processing; mathematical morphology; mathematical operators; printing; vector processor systems; aperture filters; bit vector architecture; bit vectors table; computational mathematical morphology; digital copiers; image processing hardware; memory requirements; printers; real-time compact architecture; translation-invariant windowed nonlinear discrete operators; vector observation; Color; Computer architecture; Coordinate measuring machines; Gray-scale; Hardware; Image processing; Lattices; Morphology; Printing; Testing;
fLanguage
English
Journal_Title
Image Processing, IEEE Transactions on
Publisher
ieee
ISSN
1057-7149
Type
jour
DOI
10.1109/TIP.2002.807362
Filename
1192977
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