DocumentCode :
117685
Title :
“The Novel Technique For Channel Security using UART”
Author :
Rajgure, Eshant G. ; Thakare, Ajay P.
fYear :
2014
fDate :
6-8 March 2014
Firstpage :
1
Lastpage :
6
Abstract :
In the field of communication to achieve the secured communication is the biggest challenge. The conventional techniques of transmission provide transmission efficiency but does not able to have total secured communication because of dynamic properties of channel. In this project paper after studying dynamic behavior channel we proved that this is “The Novel Technique for Channel Security”. UART (Universal Asynchronous Receiver Transmitter) is a serial communication protocol; mostly used for long-distance, high speed, low-cost data exchange between computer and peripherals. UART includes three basic modules which are the baud rate generator, receiver and transmitter. The UART implemented with VHDL language can be integrated into the FPGA (Field Programmable Gate Array) to achieve compact, stable and reliable data transmission. It is also significant for the design of SOC. In this project Paper we are concentrating on one of the most secured way of serial communication by automatic generation and detection of Baud Rate. To achieve auto bauding we adopt configuration of UART using FPGA. Due to autobauding continuous variation of baud rate by baud generator is detected by uart (receiver) but not by microcontroller (intruder). Original form of data is different than what faulty receiver collects. This system is reconfigurable and scalable and it is used to reduce the synchronization error between the subsystems with in a system.
Keywords :
computer network security; data communication equipment; field programmable gate arrays; hardware description languages; network interfaces; protocols; synchronisation; system-on-chip; FPGA; SOC; UART; VHDL language; baud rate generator; channel security; computer; data exchange; faulty receiver; field programmable gate array; peripherals; secured communication; serial communication protocol; synchronization error; transmission efficiency; universal asynchronous receiver transmitter; Clocks; Field programmable gate arrays; Generators; Receivers; Reliability; Synchronization; Transmitters; FPGA; UART; VHDL; VLSI;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Green Computing Communication and Electrical Engineering (ICGCCEE), 2014 International Conference on
Conference_Location :
Coimbatore
Type :
conf
DOI :
10.1109/ICGCCEE.2014.6922285
Filename :
6922285
Link To Document :
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