DocumentCode :
1177972
Title :
One-dimensional full search motion estimation algorithm for video coding
Author :
Chen, Mei-Juan ; Chen, Liang-Gee ; Chiueh, Tzi-Dar
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Volume :
4
Issue :
5
fYear :
1994
fDate :
10/1/1994 12:00:00 AM
Firstpage :
504
Lastpage :
509
Abstract :
A new hardware-oriented algorithm called the one-dimensional full search (1DFS) is presented for block-matching motion estimation in video compression. The simulation for this algorithm follows H.261 and MPEG international standards. In MPEG simulation, structures with 1-, 2- and 3-frame interpolation are compared. The performance of 1DFS is superior to that of other fast search algorithms. And it has more regular data flow, data reuse and less control overhead. It is an alternative for 2D full search block matching and achieves a good compromise between computational complexity and performance. With competent performance and reasonable computation complexity, the proposed method is more suitable for real-time hardware realization of a VLSI motion estimator for video applications
Keywords :
VLSI; data compression; image coding; image sequences; interpolation; motion estimation; search problems; video signals; 1D full search; H.261; MPEG; VLSI motion estimator; block-matching motion estimation; computational complexity; control overhead; data reuse; hardware-oriented algorithm; international standards; interpolation; motion estimation algorithm; one-dimensional full search; performance; video applications; video coding; video compression; Communication standards; Computational complexity; Costs; Hardware; Interpolation; MPEG standards; Motion estimation; Transform coding; Video coding; Video compression;
fLanguage :
English
Journal_Title :
Circuits and Systems for Video Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
1051-8215
Type :
jour
DOI :
10.1109/76.322998
Filename :
322998
Link To Document :
بازگشت