• DocumentCode
    117820
  • Title

    A novel method for dual output dynamic logic using SCL topology

  • Author

    Akhter, Shameem ; Chaturvedi, Sushil

  • Author_Institution
    Dept. of Electron. & Commun. Eng., Jaypee Inst. of Inf. Technol., Noida, India
  • fYear
    2014
  • fDate
    20-21 Feb. 2014
  • Firstpage
    481
  • Lastpage
    485
  • Abstract
    This paper demonstrates the idea of utilizing Source-Coupled Logic (SCL) concept in dynamic logic realization. The technique gives dual (normal as well as complemented) output. As compared to conventional dynamic logic style, by using the mentioned realization, charge sharing and contention current problems can be avoided to a large extent. The sizing requirement of keepers is not stringent in the proposed realization. The functional evaluation of the realized circuit is improved. The SPICE simulations are performed with 0.35um CMOS technology.
  • Keywords
    CMOS logic circuits; SPICE; logic design; CMOS; SPICE; charge sharing; dual output dynamic logic; dynamic logic realization; size 0.35 mum; source-coupled logic topology; CMOS integrated circuits; Capacitance; Logic gates; MOS devices; Noise; Transistors; Charge sharing; Contention current; Dual dynamic logic; Dynamic logic; Keeper;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing and Integrated Networks (SPIN), 2014 International Conference on
  • Conference_Location
    Noida
  • Print_ISBN
    978-1-4799-2865-1
  • Type

    conf

  • DOI
    10.1109/SPIN.2014.6777001
  • Filename
    6777001