• DocumentCode
    1179436
  • Title

    Efficient pipeline FFT processors for WLAN MIMO-OFDM systems

  • Author

    Sansaloni, T. ; Pérez-Pascual, A. ; Torres, V. ; Valls, J.

  • Author_Institution
    Dept. of Electron. Eng., Polytech. Univ. of Valencia, Grao De Gandia, Spain
  • Volume
    41
  • Issue
    19
  • fYear
    2005
  • fDate
    9/15/2005 12:00:00 AM
  • Firstpage
    1043
  • Lastpage
    1044
  • Abstract
    The most area-efficient pipeline FFT processors for WLAN MIMO-OFDM systems are presented. It is shown that although the R23SDF architecture is the most area-efficient approach for implementing pipeline FFT processors, RrMDC architectures are more efficient in MIMO-OFDM systems when more than three channels are used.
  • Keywords
    MIMO systems; OFDM modulation; digital arithmetic; fast Fourier transforms; microprocessor chips; pipeline processing; wireless LAN; R23 SDF architecture; RrMDC architecture; WLAN MIMO-OFDM system; area-efficient pipeline FFT processor; orthogonal frequency division multiplexing; wireless local area network;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20052597
  • Filename
    1512744
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1179436