DocumentCode
1179834
Title
A new approach to determine the effective channel length and the drain-and-source series resistance of miniaturized MOSFET´s
Author
Guo, Jyh-Chyurn ; Chung, Steve Shao-Shiun ; Hsu, Charles Ching-Hsiang
Author_Institution
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
41
Issue
10
fYear
1994
fDate
10/1/1994 12:00:00 AM
Firstpage
1811
Lastpage
1818
Abstract
A new decoupled C-V method is proposed to determine the intrinsic (effective) channel region and extrinsic overlap region for miniaturized MOSFET´s. In this approach, a unique channel-length-independent extrinsic overlap region is extracted at a critical gate bias, so bias-independent effective channel lengths (Leff) are achieved. Furthermore, the two-dimensional (2D) charge sharing effect is separated from the effective channel region. Based on this Leff and the associated bias-dependent channel mobility, μeff , the drain-and-source series resistance (RDS) can be derived from the I-V characteristics for each device individually. For the first time, the assumption or approximation for RDS and μeff can be avoided, thus the difficulties and controversy encountered in the conventional I-V method can be solved. The 2D charge sharing effect is incorporated into the bias-dependent RDS. This bias dependence is closely related to the drain/source doping profile and the channel dopant concentration. The proposed Leff and RDS extraction method has been verified by an analytical I-V model which shows excellent agreements with the measured I-V characteristics
Keywords
carrier mobility; insulated gate field effect transistors; I-V characteristics; analytical model; channel mobility; critical gate bias; decoupled C-V method; dopant concentration; doping profile; drain-and-source series resistance; effective channel length; extrinsic overlap region; miniaturized MOSFETs; two-dimensional charge sharing; Analytical models; Capacitance; Capacitance-voltage characteristics; Contact resistance; Doping profiles; Electric resistance; Electrical resistance measurement; Etching; Semiconductor process modeling; Space charge;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.324592
Filename
324592
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