Short channel characteristics of Si MOSFET with extremely shallow source and drain regions formed by inversion layers

Author

Noda, Hiromasa ; Murai, Fumio ; Kimura, Shin Ichiro

Author_Institution

Central Res. Lab., Hitachi Ltd., Kokubunji, Japan

Volume

41

Issue

10

fYear

1994

fDate

10/1/1994 12:00:00 AM

Firstpage

1831

Lastpage

1836

Abstract

The influence of extremely shallow source and drain junctions on the short channel effects of Si MOSFET´s are experimentally investigated. These extremely shallow junctions are realized in MOSFET´s with a triple-gate structure. Two subgates formed as side-wall spacers of a main gate induce inversion layers which work as the virtual source and drain. Significant improvement in threshold voltage roll-off and punchthrough characteristics are obtained in comparison with conventional MOSFET´s whose junctions are formed by ion implantation: threshold voltage roll off is suppressed down to a physical gate length of 0.1 μm while punchthrough is suppressed down to 0.07 μm, the minimum pattern size delineated. It is also demonstrated experimentally that the carrier concentrations in the source and drain do not have any influence on the short channel effects

Keywords

carrier density; elemental semiconductors; insulated gate field effect transistors; inversion layers; silicon; 0.07 micron; 0.1 micron; Si; Si MOSFET; carrier concentrations; inversion layers; punchthrough characteristics; shallow junctions; short channel effects; side-wall spacers; subgates; threshold voltage roll-off; triple-gate structure; virtual drain; virtual source; Controllability; Doping; Implants; Indium; Ion implantation; MOSFET circuits; Quantum mechanics; Solids; Testing; Threshold voltage;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.324595

Filename

324595