A Model of BGA Thermal Vias as an Example of Lumped Parameter Analysis in Thermal Modeling of SiPs and Stacked Die Packages

In this paper, a review of the different approaches to stationary thermal analysis of stacked die packages is presented, focusing on the opportunity to develop compact models suitable to be included in the design flow. Actually, although three-dimensional integration of the heat equation by numerical methods may provide an accurate estimate of the temperature distribution in the package, its main drawbacks lie in the relatively high computational cost and time consumption, together with the need of very experienced users. Simplified models are thus developed by gradually lumping thermal parameters of the various layers in order to attain a description of the device as a network of thermal resistances.