Signal Integrity Flow for System-in-Package and Package-on-Package Devices

Author

Pulici, Paolo ; Vanalli, Gian Pietro ; Dellutri, Michele A. ; Guarnaccia, Domenico ; Iacono, Filippo Lo ; Campardo, Giovanni ; Ripamonti, Giancarlo

Author_Institution

Comput. Peripherals Group, STMicroelectronics, Cornaredo

Volume

97

Issue

1

fYear

2009

Firstpage

84

Lastpage

95

Abstract

As data rates required for systems in package (SiPs) increase and their complexity increases, signal integrity issues become increasingly difficult to address. The design flow of the SiP should therefore take into account these issues from the beginning. A design flow aimed at designing the SiP tracks is presented; its suitability for the design of packages comprising multiple stacked memories is verified through a design example. The proposed flow for signal integrity can be integrated easily within the complete design of the SiP.

Keywords

signal processing; system-in-package; crosstalk; package-on-package devices; signal integrity flow; system-in-package; Analytical models; Costs; Degradation; Integrated circuit modeling; Integrated circuit packaging; Process design; Signal analysis; Signal design; Signal generators; Signal processing; Crosstalk; ground bounce; package on package (PoP); parasitics; system in package (SiP);

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/JPROC.2008.2007469

Filename

4796273