DocumentCode :
1181278
Title :
3-D Stacked Package Technology and Trends
Author :
Carson, Flynn P. ; Kim, Young Cheol ; Yoon, In Sang
Author_Institution :
STATS ChipPAC, Inc., Fremont, CA
Volume :
97
Issue :
1
fYear :
2009
Firstpage :
31
Lastpage :
42
Abstract :
The need to integrate more device technology in a given board space for handheld applications such as mobile phones has driven the adoption of innovative packages which stack such devices in the vertical or third dimension (3D). Stacking of device chips in small and thin fine-pitch ball grid array packages has evolved into the stacking of packages themselves to achieve the same end. The advantage of stacking packages rather than device chips is that packages can be fully tested good prior to stacking. There are two primary ways to stack packages to achieve such vertical integration: package-on-package (PoP) and package-in-package (PiP). Innovative variations of PoP and PiP are being developed to address specific packaging needs and market trends. This paper will detail some of the key technology supporting PoP and PiP packages currently in production and the development of new variations of such packages to address future trends.
Keywords :
ball grid arrays; fine-pitch technology; semiconductor device packaging; 3D stacked package; fine-pitch ball grid array packages; package-in-package; package-on-package; semiconductor device packaging; Electronics packaging; Logic devices; Logic testing; Mobile handsets; Packaging machines; Radio frequency; Semiconductor device packaging; Space technology; Stacking; Telephone sets; Package-in-package; package-on-package; semiconductor device packaging; three-dimensional packaging;
fLanguage :
English
Journal_Title :
Proceedings of the IEEE
Publisher :
ieee
ISSN :
0018-9219
Type :
jour
DOI :
10.1109/JPROC.2008.2007460
Filename :
4796285
Link To Document :
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