DocumentCode :
1181705
Title :
Fabrication and Characteristics of Self-Aligned Dual-Gate Single-Electron Transistors
Author :
Lee, Dong Seup ; Kang, Sangwoo ; Kang, Kwon-Chil ; Lee, Joung-Eob ; Lee, Jung Hoon ; Song, Kwan-Jae ; Kim, Dong Myong ; Lee, Jong Duk ; Park, Byung-Gook
Author_Institution :
Inter-Univ. Semicond. Res. Center, Seoul Nat. Univ., Seoul, South Korea
Volume :
8
Issue :
4
fYear :
2009
fDate :
7/1/2009 12:00:00 AM
Firstpage :
492
Lastpage :
497
Abstract :
Single-electron transistors that have electrical tunneling barriers are fabricated, and Coulomb oscillation peaks and negative differential transconductance are observed at room temperature (300 K). Operation characteristics and multioscillation peaks are further investigated at low temperature (80 K). The period of Coulomb oscillation is 2.3 V due to an ultrasmall control gate capacitance, and oscillation peaks are shifted through the side gate bias, which is explained by the derived stability plot for dual-gate structures. Even with the side gates electrically floating, the device still operates as a single-electron transistor since the p-n junction barrier plays a role of tunneling barrier. In addition, by changing the bias condition, double dots are formed along the channel and peak splitting is observed.
Keywords :
p-n junctions; single electron transistors; tunnelling; Coulomb oscillation peaks; channel splitting; differential transconductance; electrical tunneling barriers; multioscillation peaks; operation characteristics; p-n junction; self-aligned dual-gate single-electron transistors; side gate bias; temperature 293 K to 298 K; temperature 300 K; temperature 80 K; ultrasmall control gate capacitance; voltage 2.3 V; Coulomb diamond; Coulomb oscillation; double dot; single-electron transistor (SET);
fLanguage :
English
Journal_Title :
Nanotechnology, IEEE Transactions on
Publisher :
ieee
ISSN :
1536-125X
Type :
jour
DOI :
10.1109/TNANO.2009.2016209
Filename :
4796324
Link To Document :
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