Title :
High multiplication factor capacitor multiplier for an on-chip PLL loop filter
Author :
Choi, Jang-Young ; Park, Jongho ; Kim, Wonhee ; Lim, Khan ; Laskar, J.
Author_Institution :
Georgia Electron. Design Center, Georgia Inst. of Technol., Atlanta, GA
Abstract :
A capacitor multiplier with a high multiplication factor and low power consumption is proposed to integrate a large capacitor of a phase-locked loop (PLL) filter in a small chip area. The proposed capacitor multiplier makes capacitance of 516.8 pF using an on-chip capacitor of 7.95 pF with current consumption of 100 A. An integer-N PLL with a channel space of 1 MHz was fabricated with a 0.18 m CMOS technology to employ the proposed capacitor multiplier.
Keywords :
CMOS integrated circuits; capacitors; filters; multiplying circuits; phase locked loops; CMOS technology; capacitance 516.8 pF; capacitance 7.95 pF; current 100 A; frequency 1 MHz; high multiplication factor capacitor multiplier; low power consumption; on-chip PLL loop filter; phase-locked loop filter; size 0.18 mum;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20092874
