Study of 3D SiP (system-in-package) module for package-on-package application using multi-layer PCB manufacturing process

A 3D system-in-package (SiP) module for pakage-on-package (PoP) application base on the commercial multi-layer printed circuit board (PCB) using BT laminated substrate is presented in this paper. To achieve the miniaturized package-level 3D SiP, double-sided SMT process and a stacked interposer as the interconnection of IO signals were selected. One ASIC and three ADC were mounted on the top of the substrate, two ADC were mounted on the middle portion of the substrate below and several SMD capacitors were attached on the backside of the substrate. Besides, the interposer around was as the electrical interconnection of the functional substrate and the system board. The package size of the 3D SiP was 44 × 44 × 5.3 m³, with 540 solder bumps. The electrical performance and reliability of the proposed stacked package were analyzed by experimental and numerical modeling methods. In addition, process development was studied to address and overcome the assembly challenges. Furthermore, X-ray inspection was used to check the quality of the solder joints after reflow.