• DocumentCode
    1182931
  • Title

    SCR ESD protection with reduced trigger voltage

  • Author

    Nikolaidis, T. ; Papadas, C.

  • Author_Institution
    ISD S.A., Athens, Greece
  • Volume
    39
  • Issue
    7
  • fYear
    2003
  • fDate
    4/3/2003 12:00:00 AM
  • Firstpage
    608
  • Lastpage
    609
  • Abstract
    A novel silicon controlled rectifier (SCR) electrostatic discharge (ESD) protection compatible with the advanced deep submicron triple well CMOS technologies is presented. By forward biasing the p-well/cathode junction, while keeping the n-well floating during ESD, the SCR trigger and holding voltages coincide at ∼1 V. This value can be increased by a composite SCR/diode string circuit.
  • Keywords
    CMOS integrated circuits; electrostatic discharge; protection; thyristor applications; trigger circuits; 1 V; RC trigger network; SCR ESD protection; composite SCR/diode string circuit; deep submicron triple well CMOS technologies; electrostatic discharge protection; floating n-well; forward biasing; holding voltages; p-well/cathode junction; reduced trigger voltage; silicon controlled rectifier;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20030405
  • Filename
    1194136
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1182931