DocumentCode
1183524
Title
Operating limits for distortion reduction by the augmentation technique in nonlinear transistor amplifiers
Author
Tilston, N. ; McLachlan, A.D. ; Sangster, A.J.
Author_Institution
Sensor Syst. Div., BAE Syst. Avionics Ltd., Edinburgh, UK
Volume
151
Issue
5
fYear
2004
Firstpage
385
Lastpage
394
Abstract
In airborne military phased array radar systems, detection capability is influenced as much by receiver linearity as it is by system noise performance. The extremely wide dynamic range of the target returns in such systems leads to challenging receiver design compromises between amplifiers exhibiting low distortion or low thermal noise. Conventional methods that are used to improve linearity, such as increasing device size, bias current or supply voltage, inevitably result in enhanced thermal noise, higher power consumption and heat dissipation. In military aircraft, where weight and space are at a premium, these effects are difficult to accommodate. Consequently a method of amplifier linearisation is required that has minimal impact on the power consumption, size and noise figure of the receiver system. A possible solution to this problem, that has recently been advocated, relies on a process termed ´augmentation´. This solution is explored for application to weakly nonlinear receiver amplifiers and easy-to-use relationships are presented to enable designers to assess the frequency limits of the technique for particular devices and processes.
Keywords
amplifiers; distortion; linearisation techniques; military aircraft; military radar; phased array radar; radar receivers; airborne military phased array radar systems; amplifier linearisation; augmentation technique; bias current; detection capability; device size; distortion reduction; heat dissipation; military aircraft; nonlinear receiver amplifiers; nonlinear transistor amplifiers; operating limits; power consumption; receiver design; receiver linearity; receiver system; supply voltage; system noise performance; thermal noise;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings -
Publisher
iet
ISSN
1350-2409
Type
jour
DOI
10.1049/ip-cds:20040344
Filename
1367433
Link To Document