DocumentCode
1183541
Title
Realising wide bandgap P-SiC-emitter lateral heterojunction bipolar transistors with low collector-emitter offset voltage and high current gain: a novel proposal using numerical simulation
Author
Kumar, M.J. ; Reddy, C.L.
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
Volume
151
Issue
5
fYear
2004
Firstpage
399
Lastpage
405
Abstract
The authors report a novel method to reduce the collector-emitter offset voltage of the wide bandgap SiC-P-emitter lateral HBTs using a dual-bandgap emitter. In their approach, the collector-emitter offset voltage VCE(offset) is reduced drastically by eliminating the built-in potential difference between the emitter-base (EB) and collector-base (CB) junctions by using a SiC-on-Si P-emitter. It is demonstrated that the proposed dual-bandgap P-emitter HBT, together with the SiGe base and Schottky collector, not only has a very low VCE(offset) but also exhibits high current gain, reduced Kirk effect, excellent transient response and high cutoff frequency. The performance of the proposed device is evaluated in detail using two-dimensional device simulation, and a possible BiCMOS compatible fabrication procedure is also suggested.
Keywords
BiCMOS integrated circuits; Ge-Si alloys; Schottky barriers; heterojunction bipolar transistors; semiconductor device models; silicon compounds; transient response; wide band gap semiconductors; 2D device simulation; BiCMOS; Kirk effect; P-SiC-emitter heterojunction bipolar transistors; Schottky collector; SiC; SiC-on-Si P-emitter; SiGe; built-in potential difference; collector-base junction; collector-emitter offset voltage; current gain; cutoff frequency; dual-bandgap HBT; dual-bandgap emitter; emitter-base junction; transient response; wide bandgap heterojunction bipolar transistors;
fLanguage
English
Journal_Title
Circuits, Devices and Systems, IEE Proceedings -
Publisher
iet
ISSN
1350-2409
Type
jour
DOI
10.1049/ip-cds:20040295
Filename
1367435
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