• DocumentCode
    1184491
  • Title

    An efficient algorithm for the two-dimensional placement problem in electrical circuit layout

  • Author

    Goto, Satoshi

  • Volume
    28
  • Issue
    1
  • fYear
    1981
  • fDate
    1/1/1981 12:00:00 AM
  • Firstpage
    12
  • Lastpage
    18
  • Abstract
    This paper deals with the optimum placement of modules on a two-dimensional board, which minimizes the total muting length of signal sets. A new heuristic procedure, based on iterative improvement, is proposed. The procedure repeats random generation of an initial solution and its Improvement by a sequence of local transformations. The best among the local optimum solutions is taken as a final solution. The iterative improvement method proposed here is different from the previous one, in the sense that it considers interchanging more than two modules at the same time and examines only a small portion of feasible solutions which has high probability of being better. Experimental results show this procedure gives better solutions than the best one up to now. The computation time for each local optimum solution grows almost linearly with regard to the number of modules.
  • Keywords
    Computer-aided circuit design and layout; Layout; Optimization techniques; Heuristic algorithms; Integrated circuit interconnections; Iterative algorithms; Iterative methods; Large-scale systems; Pins; Routing; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1981.1084903
  • Filename
    1084903