• DocumentCode
    1184740
  • Title

    Multiple fault testing of large circuits by single fault test sets

  • Author

    Agarwal, Vinod K. ; Fung, Andy S F

  • Volume
    28
  • Issue
    11
  • fYear
    1981
  • fDate
    11/1/1981 12:00:00 AM
  • Firstpage
    1059
  • Lastpage
    1069
  • Abstract
    A general theory is presented in this paper to quantitatively predict the multiple fault coverage capability of single fault detection test sets in combinational circuits. The theory is unique in that it provides greatest lower bounds on the coverage capability of all possible circuits of concern by a simple table-look-up process. All the results known so far in this area are seen to be special cases of the theory. The more important contribution of the theory, however, is seen in its predictions made for reconvergent internal fan-out circuits. Most unexpectedly, the multiple fault coverage of such circuits by single fault test sets is discovered to be extremely precarious. Such results clearly have alarming implications in LSI and VLSI testing.
  • Keywords
    Combinational circuit testing; Digital circuits; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Instruments; Large scale integration; Logic testing; Prediction algorithms; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-4094
  • Type

    jour

  • DOI
    10.1109/TCS.1981.1084929
  • Filename
    1084929