Title :
Design of testable structures defined by simple loops
Author :
Abraham, Jacob A. ; Gajski, Daniel D.
fDate :
11/1/1981 12:00:00 AM
Abstract :
A methodology is given for generating combinational structures from high-level descriptions (using assignment statements, "if\´ statements, and single-nested loops) of register-transfer (RT) level operators. The generated structures are cellular, and are interconnected in a tree structure. A general algorithm is given to test cellular tree structures with a test length which grows only linearly with the size of the tree. It is proved that this test length is optimal to within a constant factor. Ways of making the structures self-checking are also indicated.
Keywords :
Cellular logic; Combinational circuit testing; Digital circuits; Algorithm design and analysis; Computational modeling; Design automation; Design methodology; Design optimization; Hardware; Process design; Testing; Tree data structures; Very large scale integration;
Journal_Title :
Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCS.1981.1084931