• DocumentCode
    1184874
  • Title

    Adiabatic differential voltage switch logic

  • Author

    Yang, Q. ; Zhou, R.

  • Author_Institution
    Inst. of Microelectron., Tsinghua Univ., Beijing, China
  • Volume
    40
  • Issue
    25
  • fYear
    2004
  • Firstpage
    1574
  • Lastpage
    1575
  • Abstract
    To diminish the trapped charges in internal nodes of the complex logic adiabatic gate, adiabatic differential voltage switch logic (ADVSL) using capacitance coupling technique is presented. An adiabatic system, based on a relatively small number of complex ADVSL gates, reduces not only dissipation loss, but also the gate count greatly.
  • Keywords
    adders; integrated circuit design; logic design; logic gates; low-power electronics; adders; adiabatic differential voltage switch logic; capacitance coupling technique; dissipation loss; integrated circuit design; logic adiabatic gate; logic design; low-power electronics;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20046892
  • Filename
    1368438
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1184874