Title :
High bandwidth application on 2.5D IC silicon interposer
Author :
Chen-Chao Wang ; Hung-Hsiang Cheng ; Ming-Feng Chung ; Po-Chih Pan ; Cheng-Yu Ho ; Chi-Tsung Chiu ; Chih-Pin Hung
Author_Institution :
Corp. Design Div., Adv. Semicond. Eng. Inc., Kaohsiung, Taiwan
Abstract :
A potential technology by silicon interposer enables high bandwidth and low power application processing devices of the future, because the demand of smart mobile products are driving for higher logic-to-memory bandwidth (BW) over 30 GB/s with lower power consumption and ultra-memory capacity. This paper presents a 2.5D-IC structure with silicon interposer to demonstrate electrical performances including signal integrity (SI) and power integrity (PI) by using WideIO memory interface. Of course, the accuracy of TSV has demonstrated by measurement as well.
Keywords :
elemental semiconductors; integrated circuit design; integrated circuit measurement; low-power electronics; silicon; three-dimensional integrated circuits; 2.5D IC silicon interposer design; BW; PI; SI; Si; TSV; WideIO memory interface; electrical performance; logic-to-memory bandwidth; low power application processing device; power consumption; power integrity; signal integrity; smart mobile product; ultramemory capacity; Analytical models; Couplings; Noise; Silicon; Substrates; Through-silicon vias; 2.5D-IC; Through silicon via (TSV); WideIO; power integrity (PI); signal ntegrity (SI);
Conference_Titel :
Electronic Packaging Technology (ICEPT), 2014 15th International Conference on
Conference_Location :
Chengdu
DOI :
10.1109/ICEPT.2014.6922720
