On the Limitations of Silicon for I-MOS Integration

This paper discusses the scalability of the supply voltage with the device length in silicon impact ionization MOS (I-MOS) transistors, by presenting results from both experiments and simulations. It is first shown that the supply voltage of silicon I-MOS devices saturates at low device lengths and does not fall under about 4.5 V. Second, it is shown from 2-D simulations and measurements on sub-100-nm devices that the transistor effect is lost also at low device lengths. We then propose an explanation for this phenomenon, based once again on the saturation of the supply voltage. Based on our findings, we conclude that silicon may be an inadequate material for I-MOS devices, and we envision germanium as a more promising replacement.