DocumentCode
118514
Title
A new designed trench structure to reduce the wafer warpage in wafer level packaging process
Author
Chunsheng Zhu ; Heng Lee ; Jiaotuo Ye ; Gaowei Xu ; Le Luo
Author_Institution
State Key Lab. of Transducer Technol., Shanghai Inst. of Microsyst. & Inf. Technol. (SIMIT), Shanghai, China
fYear
2014
fDate
12-15 Aug. 2014
Firstpage
606
Lastpage
609
Abstract
Wafer warpage in wafer level packaging process poses threats to wafer handling, process qualities, and can also lead to unacceptable reliability problems. With larger diameter wafer adopted, this issue becomes more serious. In the paper, a new designed trench structure was introduced in WLP process to reduce the final wafer warpage. Both experiment and simulation methods are used to investigated the effect of the trenches on the wafer warpage. The result indicates that, by forming deep trenches, the stress of individual dies is decoupled and the total the wafer warpage will be decreased. The effect of the geometry of these trenches on the mechanical behavior of the wafer was further studied by simulation.
Keywords
reliability; wafer level packaging; WLP process; deep trenches; diameter wafer; mechanical behavior; reliability problems; trench structure; wafer level packaging process; wafer warpage reduction; Electronic packaging thermal management; Electronics packaging; Packaging; Semiconductor device modeling; Silicon; Stress; Wafer scale integration; trench structure; wafer level packaging; wafer warpage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology (ICEPT), 2014 15th International Conference on
Conference_Location
Chengdu
Type
conf
DOI
10.1109/ICEPT.2014.6922729
Filename
6922729
Link To Document