DocumentCode :
1186150
Title :
Expected value analysis of digital networks with memory
Author :
Grundmann, John W. ; Bass, Steven C.
Volume :
28
Issue :
9
fYear :
1981
fDate :
9/1/1981 12:00:00 AM
Firstpage :
876
Lastpage :
887
Abstract :
The expected values of the binary signals within a digital network have a number of uses in the design of these networks. These expected value "signals" may be obtained by computationally expensive Monte Carlo methods. Alternately, probabilistic models of digital network elements may be constructed to allow the calculation of expected value information far more efficiently. The treatment of combinational logic networks was carried out in [1]. Here we probabilistically model flip flops and develop an expected value analysis for simple digital feedback networks.
Keywords :
Computer-aided circuit analysis and design; Logic circuits; Assembly; Density functional theory; Digital circuits; Feedback; Histograms; Integrated circuit interconnections; Logic devices; Manufacturing; Propagation delay; Signal design;
fLanguage :
English
Journal_Title :
Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0098-4094
Type :
jour
DOI :
10.1109/TCS.1981.1085063
Filename :
1085063
Link To Document :
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