DocumentCode :
1186241
Title :
The two-bit NROM reliability
Author :
Shappir, Assaf ; Lusky, Eli ; Cohen, Guy ; Bloom, Ilan ; Janai, Meir ; Eitan, Boaz
Author_Institution :
Saifun Semicond. Ltd., Netanya, Israel
Volume :
4
Issue :
3
fYear :
2004
Firstpage :
397
Lastpage :
403
Abstract :
Saifun NROM™ is a novel localized charge-trapping-based nonvolatile memory technology that employs inherent two-bits-per-cell operation. NROM technology is able to provide code flash, data flash, embedded flash, and true EEPROM functionality with a single fabrication process and minor architectural adjustments. Reliability topics of NROM technology are discussed, focusing on the ability to achieve 10-year data retention after 105 program and erase cycles. The accumulated knowledge of NROM physics allows this technology to successfully compete with the industry standard floating-gate memory technology and to gain the acceptance of the memory market.
Keywords :
flash memories; integrated circuit reliability; read-only storage; ONO; Saifun NROM; data retention; erase cycles; floating-gate memory technology; memory market; nitride; nonvolatile memory; program cycles; two-bit NROM reliability; two-bits-per-cell; Charge carrier processes; Costs; EPROM; Electron traps; Fabrication; Helium; Nonvolatile memory; Paper technology; Physics; Threshold voltage;
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/TDMR.2004.836717
Filename :
1369201
Link To Document :
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