DocumentCode :
1186411
Title :
Impact of scaling on the high current behavior of RF CMOS technology
Author :
Boselli, Gianluca ; Reddy, Vijay ; Duvvury, Charvaka
Author_Institution :
Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX, USA
Volume :
4
Issue :
3
fYear :
2004
Firstpage :
542
Lastpage :
548
Abstract :
In this paper, the impact of the starting material resistivity on the electrostatic discharge (ESD), latch-up, and injection induced breakdown voltage (BVii) sensitivity will be investigated for a sub-100-nm fully silicided CMOS technology for low-power and RF applications. The mechanisms through which the increase of the substrate spreading resistance enhances the uniformity of the ESD current in nMOS-based protection methods will be investigated in detail. Tradeoffs between ESD, latch-up, and BVii will be addressed as well.
Keywords :
CMOS integrated circuits; electric breakdown; electrical resistivity; electrostatic discharge; integrated circuit testing; low-power electronics; radiofrequency integrated circuits; 100 nm; RF CMOS technology; electrostatic discharge; high current behavior; injection induced breakdown voltage; latch-up sensitivity; low-power applications; material resistivity; nMOS-based protection methods; substrate spreading resistance; CMOS technology; Conductivity; Electric resistance; Electrostatic discharge; Immune system; Performance evaluation; Protection; Radio frequency; Space vector pulse width modulation; Testing;
fLanguage :
English
Journal_Title :
Device and Materials Reliability, IEEE Transactions on
Publisher :
ieee
ISSN :
1530-4388
Type :
jour
DOI :
10.1109/TDMR.2004.836163
Filename :
1369218
Link To Document :
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