DocumentCode :
1186695
Title :
Energy-Band-Engineered Unified-RAM (URAM) Cell on Buried \\hbox {Si}_{1 - y}\\hbox {C}_{y} Substrate for Multifunctioning Flash Memory and 1T-DRAM
Author :
Han, Jin-Woo ; Ryu, Seong-Wan ; Kim, Chung-Jin ; Choi, Sung-Jin ; Kim, Sungho ; Ahn, Jae-Hyuk ; Kim, Dong-Hyun ; Choi, Kyu Jin ; Cho, Byung Jin ; Kim, Jin-Soo ; Kim, Kwang Hee ; Lee, Gi-Sung ; Oh, Jae-Sub ; Song, Myeong-Ho ; Park, Yun Chang ; Kim, Jeoung
Author_Institution :
Div. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon
Volume :
56
Issue :
4
fYear :
2009
fDate :
4/1/2009 12:00:00 AM
Firstpage :
641
Lastpage :
647
Abstract :
A band-offset-based unified-RAM (URAM) cell fabricated on a Si/Si1-yCy substrate is presented for the fusion of a nonvolatile memory (NVM) and a capacitorless 1T-DRAM. An oxide/nitride/oxide (O/N/O) gate dielectric and a floating-body are combined in a FinFET structure to perform URAM operation in a single transistor. The O/N/O layer is utilized as a charge trap layer for NVM, and the floating-body is used as an excess hole storage node for capacitorless 1T-DRAM. The introduction of a pseudomorphic SiC-based heteroepitaxial layer into the Si substrate provides band offset in a valence band. The FinFET fabricated on the energy-band-engineered Si1-yCy substrate allows hole accumulation in the channel for 1T-DRAM. The band-engineered URAM yields a cost-effective process that is compatible with a conventional body-tied FinFET SONOS. The fabricated URAM shows highly reliable NVM and high-speed 1T-DRAM operations in a single memory cell.
Keywords :
DRAM chips; MOS memory circuits; MOSFET; epitaxial layers; flash memories; silicon compounds; valence bands; wide band gap semiconductors; FinFET structure; Si1-yCy; band-offset-based URAM cell; body-tied FinFET SONOS; buried substrate; capacitorless 1T-DRAM; charge trap layer; energy-band-engineered unified-RAM cell; excess hole storage node; hole accumulation; multifunctioning flash memory; nonvolatile memory; oxide-nitride-oxide gate dielectric; pseudomorphic heteroepitaxial layer; single memory cell; valence band; Capacitors; Costs; Dielectric substrates; Explosives; FinFETs; Flash memory; Nonvolatile memory; Random access memory; SONOS devices; Silicon carbide; Band offset; SONOS; SiC; body-tied FinFET; capacitorless 1T-DRAM; nonvolatile memory (NVM); unified-RAM (URAM);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2009.2014197
Filename :
4798214
Link To Document :
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