A multiple-valued logic and memory with combined single-electron and metal-oxide-semiconductor transistors

Author

Inokawa, Hiroshi ; Fujiwara, Akira ; Takahashi, Yasuo

Author_Institution

NTT Basic Res. Labs., NTT Corp., Kanagawa, Japan

Volume

50

Issue

2

fYear

2003

Firstpage

462

Lastpage

470

Abstract

Devices that combine single-electron and metal-oxide-semiconductor (MOS) transistors are newly proposed as basic components of multiple-valued (MV) logic, such as a universal literal gate and a quantizer. We verified their operation using single-electron and MOS transistors fabricated on the same wafer by pattern-dependent oxidation of silicon. We also discuss their application to an analog-to-digital converter, a MV adder, and MV static random-access memory.

Keywords

MOSFET; SRAM chips; adders; analogue-digital conversion; integrated logic circuits; large scale integration; logic gates; monolithic integrated circuits; multivalued logic circuits; single electron transistors; ADC; LSI; MOS transistor; SET-MOSFET hybrid circuits; analog-to-digital converter; combined SET/MOSFET; large-scale integrated circuits; multiple-valued SRAM; multiple-valued adder; multiple-valued logic; multiple-valued memory; pattern-dependent oxidation; quantizer; single-electron transistor; static random-access memory; universal literal gate; Adders; Analog-digital conversion; Integrated circuit interconnections; Large scale integration; Logic devices; Logic gates; MOSFET circuits; Oxidation; Silicon; Single electron transistors;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2002.808421

Filename

1196092