Modelling tools built upon the hardware description language foundation

Hardware description languages (HDLs), mainly Verilog and VHDL including their analogue/mixed-signal (AMS) extensions, represent a significant investment by the electronic design automation community. HDL technology promises productivity advances, such as a medium for intellectual property exchange, model portability, model productivity, improved design collaboration, top-down design for AMS, AMS synthesis and rich mixed-level, mixed- signal simulation for improved simulation throughput. Modelling tools represent a step towards completion of the dwelling electronic design automation community´s seek to build upon the HDL foundation. One such environment of tools described here is Paragon. Paragon is described and demonstrated on both behavioural models using multiple HDLs and compact device modelling applications. The various processes and modelling methodologies that are useful in designing and modelling complex mixed-signal circuits and systems are explored. The model creation processes of mixed-signal and mixed-technology systems at various levels of abstraction and hierarchy are described. Creation of compact behavioural models at a more abstract and language-independent level using these modelling methodologies is illustrated.