Hardware platform for software-defined WCDMA/OFDM baseband receiver implementation

Wireless communications are evolving towards multi-standard systems. As multiple radio technologies need to be integrated into a single mobile terminal, the complexity of the transceiver increases considerably. Programmable architectures and re-use of hardware and software are good methods for tackling this complexity. A programmable hardware platform is presented that enables software-defined implementation of wideband code division multiple access (WCDMA) and orthogonal frequency division multiplexing (OFDM) baseband receivers. The platform is composed of a reduced instruction set computer (RISC) core and three coprocessors. An analysis of the WCDMA and OFDM receiver algorithms shows that the algorithms employ many similar computation kernels, which can be used as functional building blocks in the dual-mode receiver implementation. The programming interface of the proposed platform does not require low-level programming or language extensions, which facilitates productive software development. SystemC-based functional simulations were carried out to find the minimum operation frequency of the platform in different modes and the power consumption was measured with gate-level simulations.