Title :
A 1-Mbit MRAM based on 1T1MTJ bit cell integrated with copper interconnects
Author :
Durlam, Mark ; Naji, Peter J. ; Omair, Asim ; DeHerrera, Mark ; Calder, John ; Slaughter, Jon M. ; Engel, Brad N. ; Rizzo, Nicholas D. ; Grynkewich, Greg ; Butcher, Brian ; Tracy, Clarence ; Smith, Ken ; Kyler, Kelly W. ; Ren, J. Jack ; Molla, Jaynal A. ;
Author_Institution :
Motorola Inc., Tempe, AZ, USA
fDate :
5/1/2003 12:00:00 AM
Abstract :
A low-power 1-Mb magnetoresistive random access memory (MRAM) based on a one-transistor and one-magnetic tunnel junction (1T1MTJ) bit cell is demonstrated. This is the largest MRAM memory demonstration to date. In this circuit, the magnetic tunnel junction (MTJ) elements are integrated with CMOS using copper interconnect technology. The copper interconnects are cladded with a high-permeability layer which is used to focus magnetic flux generated by current flowing through the lines toward the MTJ devices and reduce the power needed for programming. The 25-mm2 1-Mb MRAM circuit operates with address access times of less than 50 ns, consuming 24 mW at 3.0 V and 20 MHz. The 1-Mb MRAM circuit is fabricated in a 0.6-μm CMOS process utilizing five layers of metal and two layers of poly.
Keywords :
CMOS memory circuits; integrated circuit interconnections; low-power electronics; magnetoresistive devices; random-access storage; tunnelling magnetoresistance; 0.6 micron; 1 Mbit; 1T1MTJ bit cell; 20 MHz; 24 mW; 3.0 V; 50 ns; CMOS; MRAM; address access times; copper interconnect technology; high-permeability layer; low-power circuit; magnetic flux; one-transistor one-magnetic tunnel junction bit cell; CMOS memory circuits; CMOS technology; Copper; Integrated circuit interconnections; Integrated circuit technology; Magnetic circuits; Magnetic flux; Magnetic tunneling; Random access memory; Tunneling magnetoresistance;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2003.810048
