Title :
A correctness criterion for asynchronous circuit validation and optimization
Author :
Gopalakrishnan, Ganesh ; Brunvand, Erik ; Michell, Nick ; Nowick, Steven M.
Author_Institution :
Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA
fDate :
11/1/1994 12:00:00 AM
Abstract :
In order to reasonably determine the correctness of asynchronous circuit implementations and specifications, Dill (1989) has developed a variant of trace theory. Trace theory describes the behavior of an asynchronous circuit by representing its possible executions as strings, called “traces.” A useful relation defined in this theory is called conformance, which holds when one trace specification can be safely substituted for another. We propose a new relation in the context of Dill´s trace theory, called strong conformance. We show that this relation is capable of detecting certain errors in asynchronous circuits that cannot be detected through conformance. Strong conformance also helps to justify circuit optimization rules where a component is replaced by another component having extra capabilities (e.g., it can accept more inputs). The structural operators of Dill´s trace theory-compose, rename, and hide-are shown to be monotonic with respect to strong conformance. Experiments are presented using a modified version of Dill´s trace theory verifier that implements a check for strong conformance
Keywords :
asynchronous sequential logic; circuit analysis computing; delays; error detection; logic testing; sequential circuits; asynchronous circuit; circuit optimization; circuit validation; correctness criterion; error detection; strong conformance; trace theory; Asynchronous circuits; Circuit optimization; Cities and towns; Computer science; Conductors; Delay; Hardware; Modems; Very large scale integration; Wires;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on